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Microchip Technology /ATSAML22J16A /OSCCTRL /INTENSET

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Interpret as INTENSET

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (XOSCRDY)XOSCRDY 0 (XOSCFAIL)XOSCFAIL 0 (OSC16MRDY)OSC16MRDY 0 (DFLLRDY)DFLLRDY 0 (DFLLOOB)DFLLOOB 0 (DFLLLCKF)DFLLLCKF 0 (DFLLLCKC)DFLLLCKC 0 (DFLLRCS)DFLLRCS 0 (DPLLLCKR)DPLLLCKR 0 (DPLLLCKF)DPLLLCKF 0 (DPLLLTO)DPLLLTO 0 (DPLLLDRTO)DPLLLDRTO

Description

Interrupt Enable Set

Fields

XOSCRDY

XOSC Ready Interrupt Enable
XOSCFAIL

XOSC Clock Failure Detector Interrupt Enable
OSC16MRDY

OSC16M Ready Interrupt Enable
DFLLRDY

DFLL Ready Interrupt Enable
DFLLOOB

DFLL Out Of Bounds Interrupt Enable
DFLLLCKF

DFLL Lock Fine Interrupt Enable
DFLLLCKC

DFLL Lock Coarse Interrupt Enable
DFLLRCS

DFLL Reference Clock Stopped Interrupt Enable
DPLLLCKR

DPLL Lock Rise Interrupt Enable
DPLLLCKF

DPLL Lock Fall Interrupt Enable
DPLLLTO

DPLL Time Out Interrupt Enable
DPLLLDRTO

DPLL Ratio Ready Interrupt Enable

Links

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Register License

Copyright © 2018 Microchip Technology Inc.

SPDX-License-Identifier: Apache-2.0

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data